An analog-to-digital converter (ADC) based on Sigma-Delta operating principles requires at least one feedback digital-to-analog converter (DAC), which is used to cancel most of an ADC input signal. This DAC is the most critical part of the ADC since its output noise, which is directly referred to the ADC input, generally dominates the ADC signal-to-noise ratio (SNR). Additionally, any mismatch with an ADC input stage will typically create gain error.
Transconductance (Gm) may generally be defined as the ratio of a change in an output current due to a change in a corresponding controlling input voltage. High speed Sigma-Delta ADCs usually rely on a continuous time implementation where transconductance-capacitance (Gm/C) integrators are a popular solution for low-voltage and low-noise constrained designs. However, the output noise of a Gm cell is dominated by its quiescent biasing current, while the output signal-dependent current is a small fraction of the biasing current.
Using a Gm cell driven by an output voltage from a DAC to implement the main ADC feedback is a popular and straightforward solution. The same type of Gm cell can be used for the input stage and the feedback DAC, insuring minimum gain error induced by mismatching. However, this approach provides the higher values of resulting Gm quiescent current and therefore higher values of input noise.